DLRVR19

@inproceedings{DLRVR19,
author    = {Dureja, Rohit and Li, Jianwen and Pu, Geguang and Vardi, Moshe Y. and Rozier, Kristin Y.},
title     = {{Intersection and Rotation of Assumption Literals Boosts Bug-Finding}},
publisher = {Springer, Cham},
booktitle = {Proceedings of Verified Software: Theories, Tools, and Experiments (VSTTE)},
address   = {New York, USA},
editors   = {Supratik Chakraborty and Jorge A. Navas},
month     = {July},
year      = {2019},
url       = {https://doi.org/10.1007/978-3-030-41600-3_12},
abstract  = {This paper introduces assumption-literal heuristics that improve SAT-based bug finding in CAR and related model-checking techniques. The method increases efficiency, exposes different classes of bugs, and transfers to IC3/PDR-style reasoning as well.},
preprint  = {../papers/DLRVR19.pdf},
slides    = {../papers/DLRVR19-slides.pdf},
website   = {http://temporallogic.org/research/VSTTE19/}
}